Silicon-based transistors have been the key components in electronic devices for half a century. Further miniaturization of electronic devices is stymied by various issues including short channel effects and high heat dissipation. The use of carbon nanotubes, nanowires, and graphene in switching devices encounters similar issues as electron transport is based on tuning of conduction channels of these semiconducting materials.
The feature size of silicon field effect transistors (FETs) has continued to decrease and has led to faster and smaller electronics. However, miniaturization has created increasing difficulties in production that can eventually compromise the performance of future devices. These future FETs will encounter 1) high power consumption due to leakage in the semiconducting conduction channels; 2) short channel effects as the conduction length approaches the scale of the depletion layer width, and 3) high contact resistance between electrodes and the conduction channels. During the past two decades, nanoscale semiconductor materials have been explored for their potential use as transistors at room temperature. These include single-walled carbon nanotubes (SWCNTs), as well as nanowires (NWs) of silicon [Cui, 2003; Duan, 2003], indium phosphide [Duan, 2001], and zinc oxide [Li, 2004; Goldberger, 2005], etc. More recently, graphene, as a zero-gap semiconductor, was demonstrated as a prospective two dimensional (2D) material for ultra-high speed switches [Lin, 2010; Lee, 2008] by shifting the Fermi level through electrostatic gating. However, all these transistors are still based on the semiconducting nature of the materials, where associated issues of current leakage, short channel effects, and contact resistance remain unresolved.
Bergstrom et. al. have reported devices that are fabricated on planar substrates [Karre (2007)] by focused ion beam (FIB) depositions. However this approach is limited to tungsten QDs and require over coating by oxide films. The fabrication scheme is complicated and difficult to scale to small devices. In addition to these multi-QDs devices, there have been many demonstrations of single electron transistors using a single QD. These devices are challenging to make and are operational only at cryogenic temperatures.
High density Au nanoparticles deposited on BNNTs were reported for their electron field emission properties [Chen (2008)]. However, it was shown that this approach converts the BNNTs into conductors. Once the BNNTs are converted into conductors, they cannot be used as the tunneling channel in a field effect transistor.
High density Au nanoparticles deposited on BNNTs were also previously reported for thio-molecule functionalization [Sainsbury (2007)] but the electrical properties are unknown.
The current invention is different from the prior art, for example in the following aspects: 1) The tunneling channels, devices and arrays disclosed herein are operational at room temperature; 2) The tunneling channels, devices and arrays disclosed herein may be based on an array of tunneling elements on one-dimensional channel substrates (i.e., BNNTs or other insulating nanowires). This approach can potentially make a single array of tunneling elements between the source and drain electrode as the diameters of the 1D substrates are reduced to below 10 nm; 3) The tunneling channels, devices and arrays disclosed herein may be operational even without filling the gaps between tunneling elements with any oxide films (i.e., operational in air or vacuum); and 4) The size of the tunneling elements, and the spacing between two elements can be irregular (defect tolerant).
We show that arrays of gold quantum dots (QDs) deposited on the surfaces of insulating boron nitride nanotubes (BNNTs) can form the tunneling channel of tunnel field effect transistors (FETs). The tunneling current can be modulated at room temperature by tuning the lengths of QDs-BNNTs, the gaps between tunneling elements, and the gate potentials.